About Me
I am a Computer Engineer.
I live in Amsterdam (NL) and I am from Italy. I did my Master studies at the Politecnico di Milano and at the University of Illinois at Chicago. I work at the University of Amsterdam as a PhD candidate.
Publications
2018
Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu and Cees De Laat.
Towards Application-Centric Parallel Memories. HeteroPar 2018 (Euro-Par 2018 Workshop)
Towards Application-Centric Parallel Memories. HeteroPar 2018 (Euro-Par 2018 Workshop)
Catalin Bogdan Ciobanu, Giulio Stramondo, Ana Lucia Varbanescu, Andreas Brokalakis, Antonis Nikitakis, Lorenzo Di Tucci, Marco Rabozzi, Luca Stornaiuolo, Marco Santambrogio, Grigorios Chrysos, Charalampos Vatsolakis, Charitopoulos Georgios, Dionisios Pnevmatikatos.
EXTRA: An Open Platform for Reconfigurable Architectures. SAMOS 2018.
EXTRA: An Open Platform for Reconfigurable Architectures. SAMOS 2018.
Luca Stornaiuolo, Marco Rabozzi, Marco Domenico Santambrogio, Donatella Sciuto, Giulio Stramondo, Catalin Bogdan Ciobanu and Ana Lucia Varbanescu.
HLS Support for Polymorphic Parallel Memories. VLSI SOC 2018.
HLS Support for Polymorphic Parallel Memories. VLSI SOC 2018.
Catalin Bogdan Ciobanu, Giulio Stramondo, Cees de Laat, Ana Lucia Varbanescu.
MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs. In IPDPS Workshops 2018. ( best paper award )
MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs. In IPDPS Workshops 2018. ( best paper award )
2017
Amit Kulkarni, Poona Bahrebar, Dirk Stroobandt, Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu.
A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration. ICFPT 2017
A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration. ICFPT 2017
2016
C.B.Ciobanu, G.Stramondo, A.L.Varbanescu.
Customizable Memory Systems for High Performance Reconfigurable Architectures. In HiPEAC ACACES 2016.
Customizable Memory Systems for High Performance Reconfigurable Architectures. In HiPEAC ACACES 2016.
Giuseppe Natale, Giulio Stramondo, Pietro Bressana, Riccardo Cattaneo, Donatella Sciuto, and Marco D. Santambrogio. A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops. In Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD '16).
2015
Posters
2016
Teaching
2018/2019
Teacher Assistant for Computer Systems
2017/2018
Teacher Assistant for Programming Multi-core Many-core Systems
Teacher Assistant for Computer Systems
2016/2017
Teacher Assistant for Programming Multi-core Many-core Systems
Teacher Assistant for Computer Systems
Students Supervision
Ongoing
Roel Heirman (Master Thesis)
2017
Daniƫl Louwrink (Bachelor Thesis)